Signal analysis apparatus



R. G. HEATON SIGNAL ANALYSIS APPARATUS pct. 16, 1962 6 Sheets-Sheet 1Filed Aug. 7, 1959 Oct. 16, 1962 R. G. HEAToN 3,059,179

SIGNAL ANALYSIS APPARATUS Filed Aug. 7, 1959 6 Sheets-Sheet 3 DUE TOTIME SEQUENCE OF EVENTS DUE TO INPUT PULSE 53 INPUT PULSE 54 INPUT PULSE59 ETo RECOVERY TUBE GSIQAIALEIILSE?.

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AIIIIPLIPIER-L INVENTOR. F G, 5 RoY GoRUoN HEAT'oN Oct. 16, 1962 R. G.HEAToN 3,059,179 l SIGNAL ANALYSIS APPARATUS Filed Aug. 7, 1959 6Sheets-Sheet 4 LJLQQQ I A m B M94 D 14% L l-96 E -1F97 F J k-/O/ M L/ooL /cza NM p RELATIVE JITTER MEASUREMENT n I l I l- TIME F l G. 7INVENTOR.

- At ROY GORDON HEATON F l G' 8 AT-oRNEY Oct- 16, 1952 R. G. HEA'roN3,059,179

SIGNAL ANALYSIS APPARATUS FledlAu'g. 7, 1959 6 Sheets-Sheet 5 vd w r+ Hen f F 1,6. lo

ROY GORDON "'HEATON g 2 ATTZRNEY Oct. 16, 1962 Fild Aug. 7, 1959 R. G.HEATON SIGNAL ANALYSIS APPARATUS 6 Sheets-Sheet 6 FIG.|2

INVENTOR.

ROY GORDON HEATON Unite 3,tl59,179 SIGNAL ANALYSIS APPARATUS Roy GordonHeaton, Topsfield, Mass., assigner to Laboratory For Electronics, Inc.,Boston, Mass., a corporation of Delaware Filed Aug. '7, 1959, Ser. No.832,227 20 Claims. (Cl. S24-68) This invention relates in general toapparatus for measuring the time stability of repetitively generatedpulses and more particularly pertains to a system having modes ofoperation permitting the measurement of pulse width jitter, relativejitter, and pulse repetition rate jitter.

The invention resides in a system which derives a reference switch pulseeither Ifrom an input signal or lfrom an internal stable oscillator andin which a signal switch pulse is derived fr-m each pulse subject to thejitter measurement. The position of the signal switch pulse in relationto the position of the reference switch pulse varies in accordance withthe jitter of the subject pulse. A capacitor is arranged to charge froma datum level only during the time between the signal switch pulse andthe reference switch pulse. The peak charge on the capacitor is detectedand the detected Signal is held in a storage capacitor. Shortly beforethe next measurement is made, the storage capacitor is discharged by arecovery tube. Output signals derived from the storage capacitor areapplied to a meter and the deection of the meters pointer indicatespulse jitter. The output derived vfrom the storage capacitor may also beviewed on an oscilloscope. To prevent inaccurate indications by themeter due lto the discharging of the storage capacitor shortly beforeeach measurement is made, a transient removal -system is provided whichin large measure reduces the unwanted eifects of the transients causedby the discharge of the storage capacitor.

The arrangement of the invention together with its modes of operationmay be apprehended by reference to the following detailed descriptionwhen considered in conjunction with the accompanying drawings in which:

FIG. 1 is a schematic representation of a preferred embodiment of theinvention,

FIG. 2 depicts the details of the time conversion system employed in theinvention,

FIG. 3 illustrates certain waveforms occurring at various points in theinvention during the measurement of pulse width jitter,

FIG. 4 depicts waveforms occurring in the time conversion system of FIG.2,

FIG. 5 illustrates the circuitry comprising the transient removalsystem,

FIG. 6 depicts certain waveforms occurring at various points in theinvention during the measurement of relative jitter,

FIGS. 7 through l1 are employed to illustrate pulse width jitter,4relative jitter, and pulse repetition frequency jitter,

FIG. 12 depicts waveforms occurring at various points in the inventionduring the measurement of pulse repetition frequency jitter.

In the determination of the time stability of repetitively generatedpulses, there are three broad classes of pulse instability that arecommonly of interest. The iirst class is known as pulse width jitter andis the variation observed in repetitive pulses of the time spacingbetween the leading edge and the trailing edge of the pulses. FIG. 7shows three repetitively generated pulses which nominally have the samepulse width. If the three pulses are superimposed with their leadingedges aligned, as has been done in the magnified view of FIG. 8, it willbe seen that lthe superimposed pulses are of slightly diiferent widthsas indicated by the exaggerated mis- 3,659,179 Patented oct. 1c, 1962alignment of the trailing edges, the variation of the pulse width Atbeing termed the width jitter of the pulses.

Relative jitter is the variation in time spacing between correspondingpoints on two pulses where the two pulses are repetitively generated. InFIG. 9, for example, trigger pulses 1, 2, and 3 are shown which areemployed to drive a gate generator whose output is represented by gates4, 5, and 6, there being a nominal delay d between the leading edge of atrigger pulse and the leading edge of its associated gate. Consideringeach trigger pulse and its associated gate as a unit, if the units aresuperimposed, as in FIG. 10, with the leading edges of the triggerpulses aligned, it will be seen that the delay between the leading edgeof a trigger and the leading edge of the associated gate is not constantfor all units but exhibits a variation At, termed the relative jitter ofthe gates.

Pulse repetition frequency (PRF) jitter is the variation in time spacingbetween successive pulses in a train of periodically spaced pulses. FIG.11A illustrates a train of periodically spaced pulses i-n which theleading edge of one pulse is spaced from -the 'leading edge of itssuccessive pulse by a distance d which is seemingly the same for any twopulses. If the pulses exhibit la variation causing the distance betweenconsecutive pulses to decrease to a length d1 as shown in FIG. 11B, thenthe number of pulses which are generated in a time T is increased, thatis, the frequency at which the pulses are repeated is increased.Conversely, where the pulses exhibit a variation causing the distancebetween consecutive pulses to increase to a length d2 (FIG. 11C), thenthe number of pulses which are generated in a time T is decreased sothat the frequency at which the pulses are repeated is decreased. It isseen therefore, that a variation in the distance d between consecutivepulses results in a corresponding variation in the repetition frequencyof the pulses and that variation is termed pulse repetition frequencyjitter.

Referring now to FIG. 1 which illustrates in schematic form a preferredembodiment of the invention, there is shown an amplifier 10 having itsinput coupled to a signal input terminal 11 Iand its output connected toa diierentiator 12. Associated with the amplier is a measurement levelcontrol, here indicated by a block 13, although in practice the levelcontrol may be simply some arrangement to bias the input of amplifier 10so that the steepest portion of the input signal may be selec-ted or thesmaller undesired pulses or overshoots in the signal channel input maybe rejected. The output of diiferentiator 12 is coupled directly to theupper two contacts of switch Sl-A and the third or lowermost contact ofthat switch is connected to an inverter 14 which inverts the polarity ofthe output of the differentiator. The switch, of course, may be placedin register with any one of the three contacts. The output of theswitch-is employed to trigger a pulse generator 15 which can be amonostable multivibrator or may be some other type of relaxationoscillator such as a blocking oscillator. The pulse generator 15provides two similar rectangular output pulses, the polarity of one ofthose pulses being inverted with respect to the other pulse. It isessential that the width of the output pulses of generator 15 be highlystable since any jitter in width aifects the accuracy of the system. Inpractice a pulse width of approximately -two microseconds duration hasbeen employed. One output of generator 15 is coupled to a transientremoval system Whose purpose is explained later. The other output ofgenerator 1S is applied through a diiferentiator 16 to trigger a pulsegenerator 17 which emits a rectangular pulse, preferably of fivemicroseconds duration. Pulse generator 1'7 may be a relaxationoscillator of any suitable type, such as a monostable multivibrator,blocking oscillator, or phantastron. In connection with generator 17,some jitter in the width of its output pulses can be tolerated andunless that jitter is inordinate, it will not affect the accuracy of theinstrument. The output of generator 17 is fed through an inverteramplifier 18 to a signal channel switch 19 which forms a portion of thetime conversion system 20. Referring now to the detailed showing in FIG.2 of the time conversion system, the `output of the signal channelswitch 19 is, in the absence of an input signal to that switch,connected to ground as symbolically indicated in the box 19. The outputof switch 19 is also connected to point R of the integrator circuit 21,that circuit having an integrating capacitor 22 connected across astable voltage source 23. A resistor 24 is interposed between voltagesource 23 and junction R to limit the current drain on that source whenthe junction is grounded by switch 19. The charge on capacitor 22 isdetected by a box car detector 25 (FIG. l) and the output of thatdetector is coupled to an input of a differential amplifier 26. The boxcar detector as shown in FIG. 2 is comprised of diodes 28 and 29, andcapacitor Sil, the output of the box car detector being derived from theterminal T and across the cathode load resistor 32 of a cathode follower31. Recovery tube 33 shown in FIGS. 1 and 2, has its input connected topulse generator and in response to a trigger pulse from that generator,causes the diode 29 (FIG. 2) to provide a discharge path for capacitor3f).

Returning now to FIG. 1, a three position switch Sil-B is shown, inwhich the lowermost contact is connected to the output of differentiator12, the middle con-tact is connected to the output of a `diiferentiator9 whose input is coupled to an amplifier 34 fed from reference inputterminal 3:5, and the uppermost contact is unconnected. The output ofswitch Sli-B is connected to a clipper 36 which permits only positivegoing pulses to trigger the gate generator 37 and prevents negativegoing pulses from appearing at its output. The gate generator ispreferably a bi-stable multivibrator arranged to be triggered bypositive going pulses from clipper 36. Upon being triggered, gategenerator 37 provides a negative going wave which is applied to theinput of a fixed frequency, cohered, stable oscillator 35. The termcohered oscillator7 denotes an oscillator of the type whose oscillationsare coherent with lthe leading edge of the input gate. That is, thephase of the oscillations referred to the leading edge of `thetriggering input gate does not change ywhen the oscillator is subjectedto being triggered into oscillation and then stopped from oscillating(at the cessation of the gate) and the oscillator is again triggeredinto oscillation by another gate at some interval after it has ceased tooscillate upon the cessation of the preceding gate. The oscillator 3S isnormally biased to cut-off and is arranged so that when the negativegoing gate from generator 37 is applied, the oscillator immediatelycommences to oscillate. For example, assuming oscillator 38 to Ybe ofthe Clapp type, it may be clamped off (i.e., prevented from oscillating)by the low output impedance of a cathode follower shunting the inductorof the oscillators high-Q tank circuit. When the negative going gatefrom generator 37 is impressed on the grid of the cathode follower, thelcathode follower is biased to cut off so that its output impedancechanges from a low `to a high value. The abrupt change in the cathodefollower cathode current passing through the oscillator tank coil (i.e.,the inductor) results in a transient which initiates oscillation andcoheres the oscillator. The .output of oscillator 38 is sinusoidal andpreferably has a frequency in the vicinity of 60 to 100 kilocycles persecond. It is important to the operation of the invention thattheoscillator be stable, that is, that the output does not change infrequency as any frequency drift will impair the accuracy of the system.The duration of the gate supplied by generator 37 is determined by theoutput of a diiferentiator circuit 39 whose input is connected to pulsegenerator 17. The output of differentiator 39 causes the gate fromgenera-tor 37 to close concurrently with the trailing edge of the outputpulse of generator 17. The sinusoidal output of oscillator 38 is appliedthrough a cathode follower 40 to a phase shifter 41 having a manualcontrol permitting the input oscillation to be shifted in phase througha continuous range from Zero to 360. The purpose of the phase shifter isto provide the time reference information available from the coheredoscillator in the desired phase so that the time sequence of eventsshown in FIG. 4 can be achieved. The same phase contr-ol can be achievedby a variable delay system where a maximum delay of a full cycle isachievable, but the use of a capacitor phase shifter is preferable sinceall phases are then obtainable at a point in time only a fraction of acycle after the cohered oscillator `begins to oscillate. The output ofphase shifter 41 is impressed on the lower two contacts of a threestation switch Sil-C, the uppermost contact of that switch beingconnected to an oscillator 42. The sinusoidal signals transmittedthrough switch SI-C `are applied to a squaring amplifier a3 which maycomprise a cascade of overdriven amplifier stages. The amplifier 43changes the sinusoidal waves to a train of rectangular waves having thesame periodicity as the sinusoidal signal. The output of squaringamplifier 43 is applied to the reference channel switch e4. Referringnow to FIG. 2, reference channel switch die has its output connectedacross integrating capacitor 22. In the absence of a switching signal,the reference channel switch is closed. FIG. 2 illustrates the case whena negative reference pulse has opened the switch, as symbolicallyindicated by the switch within the box 44. However, when the negativerectangular pulse terminates, the reference channel switch closes andgrounds the high side of capactior 22 again so that the capacitor has yalow impedance discharge path .to ground.

The sinusoidal oscillator 42 of FIG. 1 is preferably a crystalcontrolled beat frequency oscillator whose frequency can be manuallyadjusted. However, other types of sinusoidal oscillators may be used,the two necessary attributes required of .such oscillators are highstability (i.e., freedom from frequency drift and from frequencymodulation) and an ability to be tuned over a range of frequencies. Theoscillator d2 is controlled by a reactance tube 4S, the reactance tubein turn being. governed by an integrating circuit le Ihaving a long timeconstant. The long time constant circuit integrates the output ofdifferential amplifier 26.

The output differential amplifier 26 is fed through an amplier 47 to apair of cathode followers 48 and 49', the output of one of those cathodefollowers being applied to a meter Stb which is calibrated to indicatejitter 1n volts, and the output of the other cathode follower is appliedto a monitor terminal 51 to which ian oscilloscope may be connected whenit is desired to View the jitter waveform.

In order to prepare the system of FIG. 1 to measure pulse width jitter,the switches Sil-A, SI-B, `and Sil-C are set to stations in which thelowermost contact is connected to the movable element. Preferably, thethree switches are contained in one assembly and the movable elementsare connected to move fas a unit. The operation of the system inmeasuring pulse width jitter will be explained in conjunction with thewaveforms illustrated in FIG. 3, the waveforms being plotted against Iacommon time scale to show the time relationship existing between thevarious waveforms occurring at different points in the system. Thepulses whose jitter is to be measured are applied at the signal inputterminal 11, it being understood that pulses may be regularly orirregularly spaced without affecting the jitter measurement of thesystem. A

pair of input pulses 53 and 54 are shown in FIG. 3A, the pulse 54 havinga Width greater than the width of pulse 53, and the difference in widthsbetween those two pulses being purposely exaggerated to aid the readerin apprehending the inventions oper-ation. Treating only pulse 53 forthe present, the leading edge of that pulse is employed as a timereference against which the time of occurrence of the trailing edge iscompared. The pulse 53, impressed on terminal 11, is fed throughamplifier and thence through differenti-ttor 12, the output of thatdifferentiator being a pair of voltage spikes 55 and 56 which arerespectively contemporaneous with the leading and trailing edges of theinput pulse SIS as indicated in FIG. 3B. The negative spike 56 causesinverter ampliiier 14 to emit a positive trigger 57` (FIG. 3C),coincident with the trailing edge of the input pulse, which istransmitted through switch S1-A and causes pulse generator 15 to betriggered into operation. Generator 15 is sensitive only to positivepulses. Pulse generator 15 provides a pair of pulses, 58, S9, shown inFIGS. 3D and 3E, having a fixed duration of about two microseconds andwhose leading edges are coincident with the trigger 57. The positivepulse 59 is applied to a recovery tube 33', causing that tube to drivethe cathode of diode 29 (FIG. 2) in 'a negative direction so thatcapacitor 30 (FIG. 2), if it was previously charged, discharges toground or to la lower positivey potential during the two microsecondduration of pulse 59. The waveform at the output of recovery tube 33 isshown in FIG. 3S. The negative pulse 58 from the output of generator 15is transmitted to the transient removal system vwhose operation willpresently be described. Positive pulse 59* is also applied to aninverter differentiator 16 whose output is `a pair of triggers 60 and61, shown in FIG. 3F, which are contemporaneous with the leading andtrailing edges of pulse 59. Only the positive going trigger 61 is ofinterest, the other spike 60 being suppressed by a clipper, if desired.To eliminate the necessity for a clipping stage, pulse generator 17 isarranged to respond only to a positive going input and, therefore, whentrigger 61 is iapplied to generator 17, that generator emits a pulse,shown in FIG. 3G, having a duration of about tive microseconds. Theoutput of generator 17 is fed into an amplifier 18l Iwhich inverts thewaveform as shown by FIG. 3H, and the negative going pulse is thenapplied to the input of signal channel switch 19 in the time `conversionsystem 20. It is apparent, that if generator 17 were ia multivibrator, anegative output pulse would be |available directly from the generatorand, therefore, the amplifier 18` could be eliminated. As indicated inFIG. 2, signal channel switch 19, in the absence of a signal, is closedso that the high side of capacitor 2-2 is 'held at ground, ground beinga datum level from which the charging of capacitor 22 is to cornmence.Upon the impress of the waveform of FIG. 3H, signal channel switch 19opens and capacitor 22 commences to charge from the source 23. Capacitor22 continues to charge until reference channel switch 44 closes andgrounds the high side of that capacitor. The closing l of referencechannel switch 44 occurs lat a fixed but adjustable interval after theleading edge of input pulse 53. `Returning to FIG. l, the outputtriggers of differeiitiator 12, the spikes 55- and 56 of FIG. 3B, laretransmitted through switch S1-B to clipper 36, as indicated in FIG. 3L,and that clipper permits the positive spike 515 to pass to its outputbut clips or removes the negative spike 56. Gate generator 57, upon theimpress of spike 55 lat its input, emits a negative-going gate, shown inFIG. 3M, and that gate causes cohered oscillator 38` to be kicked intooscillation. The output of oscillator 38 is the sinusoidal waveformshown in FIG. 3N. The oscillator is arranged so that its initial swingis always a negative going half cycle, wherefor the oscillations areinvariably coherent with the Ileading edgek of the triggering gate. Theoutput of oscillator 38% is coupled through cathode follower 40, whichacts as a buffer stage, to

phase shifter 41. The operator of the instrument manually adjusts thephase shifter until the pointer of meter 52 (FIG. 2) is positioned onIan index mark. By adjusting phase shifter 41, the output of the phaseshifter is, in effect, moved by a selected time; that is, the sinusoidalwaveform shown in FIG. 3N may, in effect, be shifted to the right or theleft. The maximum amount of shift that can be effected by the phaseshifter, preferably, is 360 which is equivalent to one cycle ofoscillation otherwise known as the period T of the oscillations. Thesine wave output of phase shifter 41 is converted to a train ofrectangular pulses by squaring amplifier 43 as indicated by FIG. 3P.When the phase of the sine Waves of FIG. 3N is shifted by phase shifter41, the rectangular pulses of FIG. 3P are shifted in time because therectangular pulses are Vderived from the sine Wave. The phase shifter,therefore, is effective to -move a rectangular pulse of FIG. 3P to anydesired position along the time axis within Ka range equal to T. Thetime shifted rectangular pulse is applied to reference channel switch44. That switch is normally held closed, and upon the irnpress of arectangular pulse, the switch is caused to open as indicated in FIG. 2,grounding the high side of capacitor 22 so that the capacitorimmediately discharges to ground. Therefore, the closing of referencechannel switch 44 prevents any charge from accumulating on capacitor 22.

Considering now the time conversion system of FIG. 2 in conjunction withthe time sequence of events occurring in that system, illustrated inFIG. 4, and assuming that capacitor 30 has been previously charged tosome voltage suicient to cause the voltage appearing iat terminal T tobe maintained at the +V level shown in FIG. 4T, then the input pulse 59(FIG. 4E) applied to the input of recovery tube 33 causes capacitor 3i)lto discharge to ground or to la low positive potential through diode 29.Since the voltage at terminal T of cathode follower 31 follows thevoltage on capacitor 30, the potential at terminal T drops to -areference level, denoted as the zero level in FIG. 4T. At the conclusionof pulse 59 capacitor 30 is uncharged land the cathodefof diode 29l isagain raised to some positive potential permitting capacitor 30` to becharged. At the conclusion of pulse 59, a signal pulse 62 (FIG. 4H),whose leading edge is coincident with the trailing edge of pulse 59, isapplied to the input of signal channel switch `19, causing that switchto open whereupon capacitor 22 commences to charge through resistor 24toward the potential of stable voltage source 23` as indicated by thewaveform of FIG. 4R. As capacitor 22 charges, cathode follower 27 raisesthe potential on the anode of diode 2S in correspondence with the chargeon capacitor 22, thereby causing capacitor 30` to charge through diode28. The effect of this is that the charge on capacitor 30 follows thecharge on capacitor 22 while the latter capacitor is charging. Capacitor22 continues to charge until the trailing edge of the delayed referencepulse 63 (FIG. 4P) arrives from squaring amplifier 46y of FIG. l. Thetrailing edge of delayed negative reference pulse 63 causes referencechannel switch 44 to close and ground the high side of capacitor 22.Capacitor 22 immediately discharges to ground as indicated in FIG. 4R,but diode 28 prevents capacitor 30 from discharging so the lattercapacitor retains its peak charge. Since the cathode follower 3'1`follows the charge on capacitor 30, the output obtained at terminal T isthe wavefrorn illustrated in FIG. 4T. Because the leading edge of signalpulse 62 (FIG. 3H) is generated after a iixed delay of about twomicroseconds `lafter the trailing edge of the input pulse 53 (FIG. 3A)and the trailing edge of reference pulse 63 is spaced in time from theleading edge of input pulse 53 by `a constant amount, the time t ('FIG.4R) during which capacitor 22 charges is determined by the width of theinput pulse 53 The integrator circuit 21 (FIG. 2) is arranged so thatcapacitor 22 charges linearly and hence the peak charge on capacitor 22is inversely proportional to the width of the input pulse. That is, thegreater the width of the input pulse applied at terminal 1.1 (FIG. 1),the less will be the peak charge on capacitor 212. Conversely, thenarrower the width of the input pulse, the greater will be the peakcharge on capacitor 22. Consider the pulse 541 of FIG. 3A, for example,which is of greater width th-an the pulse 53. The sequence of eventscaused by input pulse 54 occurring in the time conversion system isshown at the right in FIG. 4. The trailing edge of input pulse 54 isfurther removed from the leading edge of input pulse 54 than are thecorresponding edges of input pulse 53. Since the trailing edge ofreference pulse 68 (FIG. 4P) is delayed a preset interval after theoccurrence of the leading edge of input pulse 54 and the leading edge ofpulse 67 is generated la fixed time (approximately two microseconds)after the trailing edge of input pulse 54, the capacitor 22 (FIG. 2) cancharge only yduring the time interval y (FIG. 4R). Charging of thecapacitor 22 is indicated by the sawtooth waveform 69 which is of lesseramplitude than the sawtooth waveform 6dI due to input pulse 54. The peakamplitude of the integrator sawtooth (FIG. 4R) is detected and Stored incapacitor 3i) (FIG. 2), and the charge in capacitor 3111 (FIG. 4T) whichwas at the -l-Vl level due to pulse 513` level falls to the -l-V2 levelas a result of the jitter in the width of input pulse 54. The`difference in voltage levels between V1 `and V2 is therefore a measureof pulse width jitter. Now, the output which is of interest is thedifference in voltage between the levels V, V1, and V2 of FIG. 4T (thedesired output being Ias represented in FIG. 3U), since the differencein levels is the measure of pulse width jitter whereas the levelsthemselves represent the widths of the input pulses. Hence the valleysin FIG. 4T caused by pulses 65 and 70 are distinctly undesirable andshould be removed in order to prevent erroneous output indications in ameter circuit intended to display the change in voltage levelsrepresenting time jitter. Those valleys or transients are removed by thetransient removal system 71 shown in FIG. 1. The removal system has acathode follower gate switch 73 which couples the two microsecond outputpulse (FIG. 3D) from pulse generator 15 into a differential amplifier 74having a second input derived from differential amplifier 26.

FIG. shows circuitry corresponding to gate switch 73, amplifier 74, anddifferential amplifier 26. It will be noted that tube 31 and capacitor30 of FIG. 5 are the same elements illustrated in FIG. 2. The charge oncapacitor 30 varies in the manner depicted by the waveform of FIG. 3T.Assuming that capacitor 30 is initially charged to a level V, tube 31conducts a current which flows through resistors 32 and 75 and causesthe cathode of tube 31 to be maintained at a constant potential to whichcapacitor 76 is charged. The charge on capacitor 76 results in theoutput 77 of cathode follower 78 appearing as a direct voltage 79. Thegate switch 73 is arranged as a cathode follower and is biased on in theabsence of a signal from coupling capacitor 72. Tube 82 is normallybiased off Tube 83 is biased to full current conduction so that its lowplate potential causes tube 80 to be biased off. The pulse 53 (FIG. 3D)from pulse generator 1S (FIG. 1) is coupled to the grid of gate switch73 causing that tube to be cut off. 'Ihe potentials on the grids oftubes 82 and 83, therefore, become equal and the current which formerlyflowed through tube 83 now divides equally between tubes 82 and 83. Thevoltage at the plate of tube 83 rises, due to the decrease in currentthrough that tube, so that tube 80 is biased into conduction.Simultaneously, the charge in capacitor 30 drops as indicated by pulse65 in FIG. 3T. Now, the pulse 65 on the grid of tube 31 causes that tubeto decrease its current conduction and consequently the current flowthrough resistors 32 and 75' tends to decrease. However, because tube 80is biased ti into conduction, a current flows through resistor 75, tube80, and resistor 32 which ideally just offsets the decrease in currentthrough tube 31 so that no change in potential occurs at point 84. Nowif the current through tube is not suflicient to offset the decrease incurrent through tube 31, a rise in voltage occurs at the plate of tube31 which is coupled through capacitor 85 to the grid of tube 82 andcauses that tube to draw more current thereby raising the potential atjunction 86. The plate potential of tube 83, consequently rises, causingtube 39 to draw more current until the current through tube 80 justoffsets the decrease in current through tube 31. Hence, the potential atthe cathode of tube 31 (the junction 84) does not change materially.Referring now to FIG. 3T, it can be seen that the leading edge of pulse65 has an amplitude V whereas the trailing edge has a larger amplitudeV1. Therefore, at the termination of pulses S8 and 65, the grid of t-ube31 (FIG, 5) will be maintained at voltage V1 causing that tube toconduct a current of sufiicient magnitude to raise the potential atpoint 84. The capacitor 76 charges to the new potential level at point84 and the output of cathode follower 78, consequently, rises to thelevel 87. The waveform derived from terminal 77 is, hence, a steppedwaveform of the type shown in FIG. 3U. It is to be understood, that thestepped waveform in FIG. 3U illustrates the ideal case in which thetransients are completely removed. In a practical instrument, somevestige of the transients may remain in the stepped waveform, but thecircuitry of the following stages can be designed in known ways toreduce the effects of the vestiges.

The system of FIG. 1 is placed in condition to measure relative jitterby setting switches Sl-A, Sl-B, and Sl-C so that connections are made tothe middle contacts. Switch Sl-A, therefore, connects the output ofdifferentiator 12 directly to the input of pulse generator 15; switchSl-B transmits the output of diiferentiator 9 to clipper 36, and switchS1-C connects the phase shifter 41 to the input of squaring amplifier43. It will be recalled that relative jitter involves a time measurementbetween two related pulses. The leading edge of the first pulse is usedas a reference from which the jitter of the Ileading edge of the secondpulse is determined. The first pulse 90, shown in FIG. 6K is applied toreference input terminal 35 and the second pulse, pulse 91, shown inFIG. 6A, is applied at signal input 11. Considering first the effect ofthe pulse impressed at reference input terminal 35, that pulse isamplified without inversion by amplifier 34, the amplifier preferablyhaving a level control 8 permitting the grid of the amplifier to bebiased to select the steepest portion of the input waveform. The outputof amplifier 34 is fed through differentiator 9, resulting in a pair ofvoltage spikes 92 and 93 (FIG. 6L), the spike 92 being contemporaneouswith the leading edge of pluse 90. Clipper 36 removes spike 93 andallows spike 92 to be transmitted to the input gate generator 37. Uponreception of spike 92, generator 37 emits a negative gate (FIG. 61M)whose leading edge causes oscillator 3S to commence oscillating, theoutput of cohered oscillator 35 -being illustrated in FIG. 6N. It willbe noted that the initial swing of the oscillations is a negativehalf-cycle so that the oscillations are coherent with the leading edgeof the triggering gate. The output of oscillator 38 is fed throughcathode follower 40 to phase shifter 41. The phase shifter is manuallyadjusted until the desired reading is noted on milliamrneter 52 (FIG.2). As previously described, phase shifter 41 effectively changes thephase of the transmission of the sinusoidal waves derived fromoscillator 35. The output of phase shifter `41 is transmitted throughswitch Sl-C to squaring amplifier 43, the output of the squaringamplifier being the rectangular pulses depicted in FIG. 6P which areapplied to reference channel switch 44.

Considering now the effect of the second pulse 91 (BIG.

9 6A) applied at signal input terminal 1-1, the pulse is amplifiedwithout inversion by amplifier 10 and is then fed into diiferentiator12, the output of that differentiator being a pair of triggers 94 and9S, shown in FIG. 6B, which are respectively contemporaneous withleading and trailing edges of pulse 91. Trigger 95 is not used and maybe suppressed, if desired. Trigger 94., however, is transmitted throughswitch Sl-A to pulse generator 1S which thereupon generates rectangularpulses 96 and 97 (FIGS. 6D and 6E), each pulse being about twomicroseconds in duration. Pulse 96 is applied to transient removalsystem 71 whose operation was described above. Pulse 97 is applied torecovery tube 33 in time conversion system and the action of that tubeis the same as previously described. Pulse 97 is also applied to theinput of inverter differentiator 16 resulting in a pair of triggers 98and 99 (FIG. 6F) at the output of that differentiator, the trigger 99being contemporaneous with the trailing edge of pulse 97. Only trigger99 is of interest and pulse 98 may be suppressed, if desired. Trigger 99causes generator 17 to emit a rectangular pulse (FIG. 6G) having aduration of about five microseconds, the leading edge of thatrectangular pulse being contemporaneous with trigger 99. The rectangularpulse (FIG. 6G) is inverted and applied to the input of different-iator39, the output of that differentiator being a pair of triggers 160 and101, as indicated in FIG. 6J. The trigger 161 causes the gate generator37 to return to its initial condition thus closing the gate as indicatedby the waveform 102 in FIG. 6M. The rectangular pulse from generator 17is inverted by amplifier 18 as indicated in FIG. 6H (or the invertedpulse, if available, may be obtained at another point in the generator17) and this inverted pulse is applied to signal channel switch 19 intime conversion system 2t?.

The operation of the time conversion system, differential ampliiier 26,and the output stages 4,7, 48, and 49 are the same as previouslydescribed in connection with the measurement of pulse width jitter.

In the third mode of operation of the invention, that is, when thesystem of FIG. l is employed to measure pulse repetition frequency (PRF)jitter (also known as pulse repetition rate jitter), the switches S1-A,S1-B, and S1-C are positioned to make connection with the uppermostcontacts. When the switches are so positioned, clipper 36, gategenerator 37, oscillator 38, cathode follower 40, and phase shifter 41are, in effect, disconnected from the system, and the output of stableoscillator 42 is substituted as the input to squaring amplifier 43 inplace of the output from phase shifter 41. A train of pulses of the typeshown in FIG. ll is applied to signal input terminal 11 of FIG. 1. Eachpulse of that train will have the same effect as the pulse 91 (FIG. 6A)previously discussed in connection with the measurement of relativejitter. The leading edge of each pulse in the train causes a sequence ofevents to occur resulting in the generation of waveforms similar tothose shown in FIG. 6B through 6H. Hence the input to signal channelswitch 19 (FIG. 1) is a rectangular pulse similar to the pulse of FIG.6H, the leading edge of that pulse being delayed about two microsecondsfrom the leading edge vof the input train pulse impressed at terminal11. Stable oscillator 42 is tuned in frequency by the operator until itsfrequency of oscillation is at or very close to a harmonic of the pulserepetition frequency. The feedback loop utilizing the reactance tube 4Sthen locks the stable oscillator 42 accurately on the exact harmonic ofthe input PRF. After locking occurs, stable oscillator 42 is furthertuned to adjust its phase relative to that of the PRF pulse to thecenter of the dynamic range of the conversion system as indicated by thepointer on milliammeter S2 (FIG. 2) moving to an index mark on themeter, indicating a desired magnitude of charge on capacitor 30. Theoutput of differential amplifier 26 is the input to integrator 46 whosetime constant is long compared to one period of the --disturbancefrequency which is modulating the pulse l@ repetition frequency andcausing the time jitter, so that the frequency of oscillator 42 does notfollow short term variations in the pulse repetition frequency but doesfollow a slow shift or drift in repetition frequency of the input pulsetrain.

To illustrate the third mode of operation, assume that two pulses 110and 111 (FIG. 12A) are arbitrarily selected from the input pulse trainto be examined for jitter, and that stable oscillator 42 is tuned to asecond harmonic of the pulse repetition frequency. The leading edge ofinput pulse 110 sets into action a sequence of events resulting in thegeneration of the five microseconds pulse 112 (FIG. 12H) whose leadingedge is displaced two microseconds from the leading edge of pulse 110(FIG. 12A). The pulse 112 is the input to signal channel switch 19 (FIG.2) in the time conversion system. The output of oscillator 42 (FIG. l)is depicted by the sinusoidal waveform of FIG. 12V. The sinusoidal wavesare converted to rectangular pulses (FIG. 12P) by squaring amplifier 43(FIG. 1), those rectangular pulses constituting the input to referencechannel switch 44. The time during which capacitor 2,2 (FIG. 2) chargesis determined by the leading edge of pulse 112 (FIG. 12H) and a risingedge of waveform 113 (FIG. 12F), hence capacitor 22 charges as shown bythe sawtooth waveform 114 in FIG. 12R.

If the input pulse 111 (FIG. 12A) exhibits no jitter, it is spaced intime from pulse 110 by precisely the time required by oscillator 42 tocomplete two cycles of oscillation and therefore pulse 111 will causecapacitor 22 (FIG. 2) to charge, as indicated by sawtooth 115 in FIG.12R, to the same peak as sawtooth wave 114. Any jitter in pulse 111 willcause capacitor 22 to charge to a peak voltage different from the peakof sawtooth 114. The peak voltages are subsequently detected aspreviously described and the output derived is a stepped Waveform of thetype shown in FIG. 3U.

The pulse jitter measuring system described herein, in addition tomeasuring the three common classes of jitter (i.e., pulse width jitter,relative jitter, and PRF jitter), may also ybe employed to measure anodedelay time. Anode delay time is defined as the time delay in the firingof a gaseous discharge tube such as a hydrogen thyratron; it isdetermined by measuring the time (not the time variation) between theinput trigger pulse and the output pulse of the gaseous ydischarge tube.This delay, in the case of a hydrogen thyratron, is of the order of amicrosecond. In measuring anode delay time, switches Sl-A, Sl-B, andS1-C are set to connect the movable elements to the center contacts.Those switches, therefore, are in the same positions used for themeasurement of relative jitter and the waveforms shown in FIG. 6 will beemployed in explaining the method of measuring anode delay time.Assuming pulse (FIG. 6K) to be the input trigger to a hydrogen thyratronand pulse 91 (FIG. 6A) to be the thyratrons output pulse, and furtherassuming that the leading edge of trigger 90 is spaced from the leadingedge of pulse 91 by approximately yone microsecond, the impress of pulseK at reference input terminal 35 of FIG. l causes gate generator 37 toemit a negative going gate(FIG. 6M) whose leading edge turns Ion coheredoscillator 38. About one microsecond later, pulse 91 (FIG. 6A) isimpressed at signal input terminal 11 of FIG. l and some sevenmicroseconds later pulse 101 (FIG. 6I) closes the gate (FIG. 6M) therebyturning olf cohered oscillator 38. The duration of the gate (FIG. 6M) isabout eight microseconds and since the frequency of cohered oscillator38 is not more than one hundred kilocycles, the oscillator 38 makes lessthan one full cycle during the time it is on. From FIGS. 6N and 6P, itcan be inferred that only one negative going rectangular pulse isderived from each cycle of oscillator 3S. If the oscillator makes onlyone cycle of oscillation, no ambiguity exists as to the derivedrectangular pulse. Now setting phase shifter 41 is to provide a chargeon capacitor 30 i l (FIG. 2) of V1 volts as shown in FIG. 4T, andassuming the voltage drops to the V2 level after four or tive minutesbecause of a change in anode delay time, by adjusting phase shifter '41the voltage level can be brought back to the V1 level. The amount ofphase shift necessary to restore the voltage to the V1 level is a directmeasure of the change in anode delay time and the phase shifter can becalibrated to read anode delay time in microseconds or a conversionchart may be used to change degrees of phase shift to delay inmicroseconds.

While a preferred embodiment ot the invention has been illustrated inFIGS. 1, 2, and 5, it is to be understood that modiiications may be madewithout departing from the essence of the invention. It is thereforeintended that the invention not be restricted to the precise embodimentshown in the drawings, but rather that the scope of the invention bedetermined in accordance with the appended claims.

I claim:

1. A pulse jitter tester comprising an integrator and a source ofelectric potential connected thereto for charging said integrator,switching apparatus connected to said integrator, said apparatusmaintainingr the charge in said integrator at a reference level, meansfor generating a reference signal which includes an adjustable mechanismfor shifting said reference signal in time, means for generating a firstsignal whose position in time relative to said reference signal variesin correspondence with the jitter of the pulse subject to themeasurement, and means for applying said first signal and said referencesignal to said switching apparatus, said apparatus causing saidintegrator to charge during the simultaneous occurrence of said iirstsignal and said reference signal.

2. A ydevice for measuring the jitter of repetitively generated pulsescomprising, first means for generating a reference switching signal foreach pulse whose jitter is to be measured, said rst means including amechanism for shifting said reference signal in time, means forgenerating a second switching signal whose time relation to saidreference signal varies in correspondence with the jitter of themeasured pulse, a capacitor, a source of electric potential for chargingsaid capacitor, switching means connected between said capacitor andsaid source, said switching means in the absence of a switching signalmaintaining the charge in said capacitor at a datum level, and means forapplying said switching signals to actuate said switching means, saidswitching means in response to said switching signals causing saidcapacitor to charge during the time interval in which said secondswitching signal and said reference switching signal overlap.

3. A device for measuring pulse jitter comprising a l capacitor, asource of electric potential for charging said capacitor, a first switchconnected between said source and said capacitor, said iirst switch inthe absence of a switching signal maintaining the charge in saidcapacitor at a datum level, a second switch connected between saidsource and said capacitor, signal generating means coupled to saidsecond switch for generating a reference signal, said signal generatingmeans including a mechanism for selectively shifting said referencesignal in time, said reference signal conditioning said second switch topermit charging of said capacitor, signal generating means coupled tosaid first switch for generating a switching signal whose time relationto said reference signal varies in correspondence with the jitter of thepulse which is the subject of the measurement, said first switch beingactuated by said switching signal to cause said capacitor to charge, andmeans coupled to said capacitor for ydetermining the charge on saidcapacitor.

4. A device for measuring pulse jitter comprising a capacitor, a sourceof electric potential for charging said capacitor, a first switchconnected between said source and said capacitor, said iirst switch inthe absence of a switching signal maintaining the charge in saidcapacitor at a datum level, a second switch connected between saidsource and said capacitor, rst signal generating means coupled to one ofthe two switches for generating a reference signal, said first signalgenerating means including a mechanism for selectively shifting saidreference signal in time, second signal generating means coupled to theother of said switches for generating a switching signal whose positionin time relative to said reference signal varies in correspondence withthe jitter of the pulse which is the subject of the measurement, saidswitches in response to said switching and reference signals causingsaid capacitor to be connected across said source during the timeinterval in which said switching and reference signals overlap, andmeans connected to said capacitor for determining the charge on saidcapacitor.

5. A pulse jitter tester comprising a capacitor, a source of potentialfor charging said capacitor, switching apparatus connected between saidcapacitor and said source, said apparatus in the absence of a switchingsignal maintaining the charge in said capacitor at a datum level, asignal input terminal, means connected to said terminal for generating atirst switching signal whose position in time varies in accordance withthe jitter of the input signal pulse, a reference input terminal, meansconnected to said reference input terminal for deriving a referenceswitching signal from an input reference pulse, means for varying theposition of the reference switching signal to cause it to overlap thefirst switching signal, and means for applying said iirst switchingsignal and said reference switching signal to said apparatus, saidapparatus in response to the simultaneous existence of said switchingsignais causing said capacitor to charge, and said apparatus in responseto the termination of said reference switching signal preventing furthercharging oi said capacitor.

6. A device for measuring jitter between repetitively generatedreference pulses and repetitively generated pulses which are the subjector the measurement cornpr-ising, means for deriving a iirst triggersignal from an edge of a reference pulse, means for deriving a secondtrigger signal from a corresponding edge of a subject pulse, meansresponsive to said first trigger signal for generating a referenceswitching signal and such means including an adjustable mechanism forshifting said reference switching signal in time, means responsive tosaid second trigger pulse for generating a second switching signal, acapacitor, a source orc electric potential for charging said capacitor,switching apparatus connected between said capacitor and said source,said apparatus in the absence of a switching signal maintaining thecharge on said capacitor at a datum level, means for applying saidreference switching signal and said second switching sig- `nal to saidswitching apparatus to cause said capacitor to charge from said sourcefor the time interval in which said switching signals are coexistent,and means for determining the variation in charge on said capacitorcaused by successive measurements.

7. A time conversion system comprising a tirst capacitor, a source ofelectric potential for charging said iirst capacitor, a iirst switchconnected between said source and said first capacitor, a second switchconnected between said source and said iirst capacitor, one of saidswitches normally maintaining the charge in said rst capacitor at adatum level and causing said first capacitor to charge from said sourcein response to a first switching signal, the other of said switchesbeing responsive to a second switching signal to prevent furthercharging of said first capacitor, a storage capacitor, means detectingthe peak charge on said rst capacitor and applying said detected signalto said storage capacitor, means responsive to a recovery pulse fordischarging said storage capacitor, and means for determining thevariation of the charge in said storage capacitor.

8. A pulse jitter measuring system comprising a signal input terminal,means for deriving a first trigger from each pulse impressed at saidinput terminal, a iirst generator responsive to said first trigger forproviding a stable width pulse, means coupled to the output of saidfirst pulse generator for deriving a second trigger delayed in time fromsaid first trigger, a second generator responsive to said second triggerfor providing a signal switching pulse, a reference input terminal,means for deriving a third trigger from each pulse impressed at saidreference input terminal, a gate generator responsive to said thirdtrigger for supplying aV gate signal, a iixed frequency coheredoscillator having its output coupled to a phase shifter, actuation ofsaid oscillator being controlled by said gate signal, means coupled tothe output of said phase shifter for deriving a reference switchingpulse therefrom, a capacitor, a source of potential for charging saidcapacitor, switching apparatus for controlling the charging of saidcapacitor, and means for coupling said reference switching pulse andsaid signal switching pulse to said switching apparatus to cause saidcapacitor to charge during the interval in which said switching pulsesare coexistent.

9. A pulse jitter measuring system according to claim 8, furthercomprised by a box car detector for detecting the peak charge on saidcapacitor, a transient removal system gated by the output of said iirstgenerator, and a diierential amplifier having one input coupled to saidbox car detector and the second input connecte-d to said transientremoval system.

10. A pulse jitter measuring system according to claim 9, in which saidbox car detector has a storage capacitor for storing the detectedsignal, and said measuring system further includes a recovery tubeconnected between said rst generator and said box car detector wherebysaid recovery tube in response to an output pulse from said rstgenerator causes said storage capacitor to discharge.

1l. A pulse jitter measuring system according to claim 10, and in whichsaid transient removal system includes a gate switch and a differentialamplifier gated by said gate switch.

12. A pulse jitter measuring system comprising a signal input terminalcoupled to the input of a iirst dierentiator, a stable width pulsegenerator having its input coupled to the output of said rstdiierentiator, means for deriving a trigger from the output of saidstable width pulse generator, a second pulse generator responsive tosaid trigger for generating a rst switching signal, a tunable stableoscillator, a squaring amplifier connected to the output of saidoscillator, said squaring amplier providing a time stable referenceswitching signal, a capacitor, a source of potential for charging saidcapacitor, switching apparatus for controlling .the charging of saidcapacitor, and means for coupling said switching signals to saidswitching apparatus to cause said capacitor to charge during theinterv-al in which said iirst switching signal and said referenceswitching signal coexist.

13. A pulse jitter measuring system according to claim 12, fur-therincluding a reactance tube for controlling the frequency of saidoscillator, an integrating circuit for regulating said reactance tube, abox car detector for detecting the peak charge on said capacitor, andmeans coupling the output of said detector to the input of saidintegrating circuit.

14. A pulse jitter measuring system according to claim 13, in which saidbox car detector has a storage capacitor for storing the detectedsignal, and said measuring system further includes a recovery tubeconnected between the output of said stable width pulse generator andsaid box car detector whereby said recovery tube causes said storagecapacitor to discharge in response to a pulse from said stable widthpulse generator.

l5. A pulse jitter measuring system accord-ing to claim 14, furtherincluding a transient removal system gated by said stable width pulsegenerator, said transient removal system removing the transients causedby the rapid .discharge of said storage capacitor.

16. A pulse jitter measuring system comprising, a signal input terminalcoupled to the input of a rst diiferentiator, a irst generator forproviding pulses of stable width, a signal inverter coupled to theoutput of said rst dilerentiator, a rst switch for coupling the outputof said iirst differentiator or said inverter to the input of said iirstgenerator, a second diferentiator connecting the output of said firstgenerator to the input of a second pulse generator, a capacitor, asource of potential for charging said capacitor, a pair of channelswitches controlling ythe charging of said capacitor, means coupling theoutput of said second generator -to one of said channel switches, aiixed frequency cohered oscillator, a gate generator controlling theactivation of said cohered oscillator, a phase shifter having its inputcoupled to the output of said cohered oscillator, a squaring ampliiier,a second switch for connecting the output of said phase shifter to theinput of said squaring amplier, and means coupling the output of saidsquaring amplifier to the other of said channel switches.

17. A pulse jitter measuring system according to claim 16, furtherincluding a reference input terminal coupled to the input of a thirddiierentiator, and a third switch for selectively coupling the output ofsaid iirst or third ditferentiator to the input of said gate generator.

18. A pulse jitter measuring system according to claim 17, furthercomprised by a tunable stable oscillator having its output selectivelyconnectible through said second switch to the input of said squaringamplifier.

19. A pulse jitter measuring system according to claim 18, furtherincluding a box car detector for detecting the peak charge on saidcapacitor, means coupling the output of said detector rto the input ofan integrator having a long time constan-t, and a react-ance tubegoverned by the output of said integrator and controlling the frequencyof said stable oscillator.

20. A pulse jitter measuring system according to claim 19, in which said|box car detector has a storage capacitor for storing detected signals,and said measuring system further includes a recovery tube connectedbetween the output of said tirs-t generator and said box car detector,said recovery tube in response Ito a stable width pulse causing saidstorage capacitor [to discharge.

References Cited in the ile of this patent UNITED STATES PATENTS

